A*STAR’s Institute of Microelectronics (IME) has collaborated with leading industry players to establish 300mm Wafer Level Package development line (WLP-DL) to drive the application of fan-out wafer level packaging (FOWLP) for achieving innovations in current and next generation system-in-package (SiP). The state-of-the-art 300mm FOWLP development line supports industry partners across the semiconductor supply chain by leveraging IME’s advanced packaging expertise, novel heterogeneous integration solutions, and design enablements including SiP Process Design Kit (PDK). IME’s 300mm WLP-DL enables industry players across the supply chain [end-users, fabless companies, integrated device manufacturers (IDMs), foundries, outsourced semiconductor assembly and test (OSAT) companies, equipment makers, electronic design automation (EDA) companies, and material suppliers] to create new and enhanced products that are increasingly driven by applications such as 5G, high-performance computing, hyperscale data centres, autonomous vehicles, medical wearable devices and advanced sensors.

As global connectivity transitions into 5G, the semiconductor industry gears up to develop technologies and products that drive the sophisticated packaging formats required to manufacture integrated circuits (ICs) for handsets, base-stations, and customer-premise-equipment (CPE).
For example, base stations require integration of the Power Amplifier (PA) chips, millimetre wave monolithic ICs (MMICs), passive components and millimetre wave (mmWave) antenna arrays to support high speed and high bandwidth communication. To ensure low electrical losses and optimal RF/mmWave performance in tightly-integrated mmWave SiP, key must-haves include multi-chip package design optimisation, new packaging materials, and tighter process controls. Such mmWave SiP combines the MMIC and the antenna within the same package module, called antenna-in-package (AiP) which brings the MMIC much closer to the antenna than earlier implementations to reduce the signal losses in next generation wireless systems.

FOWLP offers 300mm precision wafer manufacturing, excellent design flexibility, and packaging material choices which makes it ideal for implementing the mmWave AiP structure. The mmWave 3D-FOWLP Antenna-in-Package implemented by IME is a novel double-molded structure based on IME’s FOWLP technology, which can provide optimised performance in smaller package area. Using FOWLP integration, the antenna is designed on top mold layer while the bottom mold layer houses the MMIC – thus reducing the package footprint, which is critical for mobile applications.

The wafer level Copper Redistribution Layers (RDL) provide precise transmission lines and antenna feeds that enable the antenna function. The AIP structure can also be used to design a scalable sub-array of AiP. The sub-array is then used to realise the compact antenna array with more elements, to meet the requirements of for wireless infrastructure (base station) applications. Application of the AiP structure removes the need for a separate high-frequency board between the MMIC package and on-board antenna – thus making the solution compact and more cost-effective for a variety of mmWave applications including 5G and automotive radar.

Underside of the AiP with solder ball

AiP assembled on the PCB

IME also provides SiP designers with design enablements including process-design-kit (PDK) to allow designers to create the SiP design using FOWLP technology. Thus, from design to proof-of-concept to product-prototyping, the FOWLP development line combines IME’s design enablement and advanced FOWLP technology to provide end-to-end advanced package manufacturing solution to industry partners. Through this capability, IME enables industry partners to accelerate product development through differentiated SiP solutions.

About the Institute of Microelectronics (IME)
The Institute of Microelectronics (IME) is a research institute of A*STAR’s Science and Engineering Research Council, with an aim to add value to Singapore’s semiconductor ecosystem by developing strategic competencies, innovative technologies and intellectual property, and enabling enterprises to be technologically competitive. R&D at IME focuses on the semiconductor technology chain, such as smart integrated circuit design, wafer fabrication process technology, packaging and assembly and reliability testing and analysis. IME has also established application-driven programmes with its R&D efforts focused in new technologies such as IoT on the Edge, Heterogeneous Integration, System in Package, Sensors, Actuators & Microsystems, Power Electronics and Medtech.

For more information on IME, please visit www.a-star.edu.sg/ime

For more information about this research, please contact:
Mr Javen Tan
Senior Manager, Institute of Microelectronics (IME)
Email: javen_tan@ime.a-star.edu.sg