Dr. Kenneth E. Lee
Dr. Kenneth E. Lee
Senior Scientific Director, Singapore-MIT Alliance for Research and Technology (SMART)
Dr. Kenneth E. Lee is the Senior Scientific Director of the Low Energy Electronic Systems (LEES) Interdisciplinary Research Group at the Singapore-MIT Alliance for Research and Technology (SMART). In LEES, he is responsible for driving the core program effort to create a novel hybrid III-V + CMOS platform to enable new integrated electronic and photonic systems. This includes having oversight of multidisciplinary research in a complete vertical from materials and processes to devices, circuits and systems, so as to enable seamless integration with foundry-standard CMOS process flows. Prior to this, Dr. Lee had stints in the Future Systems and Technology Directorate of the Ministry of Defence, as well as with the Applied Physics Laboratory in DSO National Laboratories, and in Temasek Laboratories at Nanyang Technological University. Dr. Lee received his B.S. and M.S. degrees from the University of Illinois at Urbana-Champaign in 1998 and 1999, respectively, and his Ph.D. degree from the Massachusetts Institute of Technology in 2009, all in Electrical Engineering.
Presentation Topic: Making Silicon New Again
The economic and technical challenges of pushing towards the ultimate physical limits of Moore’s Law are burgeoning. Beyond traditional density scaling, increased dimensionality, in terms of both transistor design and packaging schemes, is being used to obtain further functional and performance improvements. Higher performance advanced materials are also being sought to replace silicon as the active material. Yet these methods of pushing for a technological edge are very costly, and require significant capital investment to upgrade existing infrastructure or even create brand new wafer fabs.
A different approach is to start with existing mature processes and infrastructure, and find a means to integrate different semiconductor materials and devices while utilizing as much of the existing silicon CMOS supply chain as possible. By combining the right advances in epitaxy, wafer bonding, microfabrication, device design and modeling, we can incorporate compound semiconductor circuit elements into traditional silicon CMOS integrated circuits, thereby augmenting silicon and making silicon new and exciting again.
This provides a pathway to incorporate efficient optical, wireless and RF elements into integrated circuits with a scalable commercial model similar to the existing silicon world. This will enable the creation of space-efficient silicon systems that have illumination and display functions, and next generation wireless communication capabilities, which are well-suited for mobile and automotive applications. As was the case with silicon integration in the past, application-specific integrated circuits (ASICs) will lead the way in the utilization of the new silicon.